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RISC - Pre-RISC design philosophy |  | RISC - Pre-RISC design philosophy: Encyclopedia II - RISC - Pre-RISC design philosophy |  | In the early days of the computer industry, compiler technology did not exist. Programming was done in either machine code or assembly language. To make programming easier, computer architects created more and more complex instructions which were direct representations of high level functions of high level programming languages. The attitude at the time was that hardware design was easier than compile ...
See also:RISC, RISC - RISC design philosophy, RISC - Pre-RISC design philosophy, RISC - Meanwhile..., RISC - Early RISC, RISC - Later RISC, RISC - Alternative term |  | | RISC, RISC - Alternative term, RISC - Early RISC, RISC - Later RISC, RISC - Meanwhile..., RISC - Pre-RISC design philosophy, RISC - RISC design philosophy, addressing mode, CISC, ZISC, microprocessor, instruction set architecture, computer architecture, Classic RISC pipeline, John Mashey's comp.arch RISC vs CISC ... 1997 |  | |
|  |  | RISC: Encyclopedia II - RISC - Pre-RISC design philosophy
RISC - Pre-RISC design philosophy
In the early days of the computer industry, compiler technology did not exist. Programming was done in either machine code or assembly language. To make programming easier, computer architects created more and more complex instructions which were direct representations of high level functions of high level programming languages. The attitude at the time was that hardware design was easier than compiler design, so the complexity went into the hardware.
Another force that encouraged complex instructions was the lack of large memories. Since memories were small, it was advantageous for the density of information held in computer programs to be very high. When every byte of memory was precious, for example one's entire system only had a few kilobytes of storage, it moved the industry to such features as highly encoded instructions, instructions which could be variable sized, instructions which did multiple operations and instructions which did both data movement and data calculation. At that time, such instruction packing issues were of higher priority than the ease of decoding such instructions.
Memory was not only small, but rather slow since they were implemented using magnetic technology at the time. That was another reason to keep the density of information very high. By having dense information packing, one could decrease the frequency when one had to access this slow resource.
CPUs had few registers for two reasons:
- bits in internal CPU registers are always more expensive than bits in external memory. The available level of silicon integration of the day meant large register sets would have been burdensome to the chip area or board areas available.
- Having a large number of registers would have required a large number of instruction bits (using precious RAM) to be used as register specifiers.
For the above reasons, CPU designers tried to make instructions that would do as much work as possible. This led to one instruction that would do all of the work in a single instruction: load up the two numbers to be added, add them, and then store the result back directly to memory. Another version would read the two numbers from memory, but store the result in a register. Another version would read one from memory and the other from a register and store to memory again. And so on. This processor design philosophy eventually became known as Complex Instruction Set Computer (CISC).
The general goal at the time was to provide every possible addressing mode for every instruction, a principle known as "orthogonality." This led to some complexity on the CPU, but in theory each possible command could be tuned individually, making the design faster than if the programmer used simpler commands.
The ultimate expression of this sort of design can be seen at two ends of the power spectrum, the 6502 at one end, and the VAX at the other. The $25 single-chip 6502 effectively had only a single register, and by careful tuning of the memory interface it was still able to outperform designs running at much higher speeds (like the 4 MHz Zilog Z80). The VAX was a minicomputer whose initial implementation required 3 racks of equipment for a single cpu, and was notable for the amazing variety of memory access styles it supported, and the fact that every one of them was available for every instruction.
Other related archives29000, 4-letter acronyms, 6502, 68000, 8086, 88000, ALU, AMD, ARM, AS/400, Acorn Archimedes, Advanced RISC Machine, AltiVec, Andrew Tanenbaum, Apple Macintosh, CDC 6600, CISC, CPU, CPU design, Classic RISC pipeline, Complex Instruction Set Computer, Computer architecture, Computing acronyms, DARPA, DEC Alpha, Data General Nova, David Patterson, Freescale, Game Boy Advance, Gamepark, HP/PA, Harvard memory model, Hewlett-Packard, IBM, IBM 801, IBM RT-PC, INMOS Transputer, Intel, John L. Hennessy, MIPS, MIPS Computer Systems, Microsoft, Motorola, Nintendo, Nintendo 64, Nintendo DS, PA-RISC, POWER, Palm, Inc., PlayStation, PlayStation 3, PowerPC, Pyramid Technology, R2000, RNA-induced silencing complex, Revolution, SGI, SIMD, SPARC, SPECfp, SPECint, Seymour Cray, Sony, Stanford University, Streaming SIMD Extensions, Sun, Sun Microsystems, UC Berkeley, UK, UltraSPARC, VAX, VLSI, Xbox 360, ZISC, Zilog Z80, addressing mode, addressing modes, assembly language, battery, bits, branch delay slot, byte, cache, caches, compiler, compilers, complex numbers, computer architecture, embedded processors, floating point, game consoles, i860, i960, iSeries, instruction set architecture, instructions, integer, machine code, memory, memory access, microcontrollers, microprocessor, minicomputer, paradox, parallel computing, pipeline, programs, proprietary, register windows, registers, semiconductor, strings, supercomputer, superscalar, transistors, word, workstation, x86, x86-64
 Adapted from the Wikipedia article "Pre-RISC design philosophy", under the G.N U Free Docmentation License. Please also see http://en.wikipedia.org/wiki |
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