 | IBM 1620: Encyclopedia II - IBM 1620 - Development history
IBM 1620 - Development history
In 1958 IBM assembled a team at the Poughkeepsie, New York development laboratory to study the "small scientific market". Initially the team consisted of Wayne Winger (Manager), Robert C. Jackson, and William H. Rhodes.
The competing computers in this market were the Librascope LGP-30 and the Bendix G-15, both were drum memory machines and it was concluded that IBM could offer nothing really new in that area. To compete effectively would require use of technologies that IBM had developed for larger computers, yet the machine would have to be produced at the least possible cost.
To meet this objective, the team set the following requirements:
- Core memory
- Restricted instruction set
- No divide or floating point instructions, use subroutines in the "general program package"
- Wherever possible replace hardware with existing logical machine functions
- No arithmetic circuits, use tables in core memory
- Least expensive Input/Output possible
- No punch cards, use paper tape
- No printer, use operators console typewriter
The internal code name CADET was selected for the machine. One of the developers says that this stood for "Computer with ADvanced Economic Technology", however others recall it as simply being one half of "SPACE - CADET", where SPACE was the internal code name of the IBM 1401 machine, also then under development.
The team expanded with the addition of Anne Deckman, Kelly B. Day, William Florac, and James Brenza. They completed the CADET prototype in the spring of 1959.
Meanwhile the San Jose, California facility was working on a proposal of its own. IBM could only build one of the two and the Poughkeepsie proposal won because "the San Jose version is top of the line and not expandable, while your proposal has all kinds of expansion capability - never offer a machine that cannot be expanded".
Management was not entirely convinced that core memory could be made to work in small machines, so Gerry Ottaway was loaned to the team to design a drum memory as a backup. During acceptance testing by the Product Test Lab repeated core memory failures were encountered and it looked likely that management's predictions would come true. However at the last minute it was found that the fan used to blow hot air through the core stack was malfunctioning, causing the core to pick up noise pulses and fail to read correctly. After the fan problem was fixed there were no further problems with the core memory and the drum memory design effort was discontinued as unnecessary.
Following announcement of the IBM 1620 on October 22, 1959, due to an internal reorganization of IBM, it was decided to transfer the computer from the Data Processing Division at Poughkeepsie (large scale mainframe computers only) to the General Products Division at San Jose (small computers and support products only) for manufacturing.
Following transfer to San Jose, someone there jokingly suggested that the code name CADET actually stood for "Can't Add, Doesn't Even Try", referring to the use of addition tables in memory rather than dedicated addition circuitry. This stuck and became very well known among the user community.
IBM 1620 - Implementation levels
- Model I
- Level A; prototype.
- All flip-flops in the design were transistorized versions of the original Eccles-Jordan trigger circuit. While this machine was fully functional, it was found that the capacitor coupling used in these proved troublesome in the noisy signal environment of relays and timing cam driven switches used to drive the console typewriter. This necessitated a complete redesign of the machine to use S-R flip-flops instead (except for two triggers used to generate clocks for the S-R flip-flops). However usage of the term Trigger was retained in all the documentation when referring to a flip-flop, as it was IBM's conventional term (as alphamerics was their term for alphanumerics).
- This is the only level using a one piece vertical control panel, when the design was transferred from Poughkeepsie to San Jose it was redesigned to the two piece angled control panel used on all production models.
- Level B; first production.
- This is the only level using a burnished aluminum lower control panel, later levels finished this panel with white.
- Level C; introduction of 1622 card reader/punch.
- Level D; introduction of 1311 disk drives and addition of optional "Gate J" containing disk control logic.
- Level E
- Level F; introduction of Floating Point option.
- Level G; final version of the Model I, much of logic was compacted using cards designed for the Model II, "Gate J" logic merged into "Gate A" & "Gate B" using card slots freed up by this redesign.
- Model II (no information on "Levels" available at this time)
- Model III
- Work was begun on a 1620 Model III in year-TBD, but the project was quickly canceled as IBM wanted to promote sales of their new System/360 and discontinue the old lines.
IBM 1620 - Patents
- 3,049,295 - Multiplying Computer
- Patent filed: December 20, 1960
- Patent issued: August 14, 1962
- Inventors
- William H. Rhodes
- James G. Brenza
- Wayne D. Winger
- Robert C. Jackson
- Claims and prior art references
- Diagrams and Text
- 156 sheets of diagrams (Describes 1620 in full details.)
- 31 sheets of text
- 3,328,767 - Compact Data Lookup Table
- Patent filed: December 31, 1963
- Patent issued: June 27, 1967
- Inventors
- Claims and prior art references
- Diagrams and Text
- 5 sheets of diagrams
- 4 sheets of text
- 3,199,085 - Computer with Table Lookup Arithmetic Unit Feature
- Patent filed: December 20, 1960
- Patent issued: August 3, 1965
- Inventors
- William H. Rhodes
- James G. Brenza
- Wayne D. Winger
- Claims and prior art references
- Diagrams and Text
- 156 sheets of diagrams (Describes 1620 in full details.)
- 31 sheets of text
- 3,239,654 - Dividing Computer
- Patent filed: February 8, 1961
- Patent issued: March 8, 1966
- Inventors
- Robert C. Jackson
- William A. Florac
- Wayne D. Winger
- Claims and prior art references
- 9 claims
- 1 prior art
- 3 publications
- Diagrams and Text
- 13 sheets of diagrams
- 19 sheets of text
Other related archives1620 II, 1957, 1958, 1959, 1960, 1961, 1962, 1963, 1965, 1966, 1967, 1970, 7400 series, August 14, August 3, BCD, Bendix G-15, Colossus: The Forbin Project, December 20, December 31, Edsger Dijkstra, February 8, Fixed-point, Floating-point, Herbert Kroemer, IBM, IBM 1311, IBM 1401, IBM 1620 I, IBM 1620 II, IBM 1627, IBM 1710, IBM 1720, Instructions, June 27, Librascope LGP-30, MSI, March 8, Model I, Model II, November 19, October 21, October 22, PDP-8, Poughkeepsie, New York, Printer, SSI, San Jose, California, Standard Modular System, System/360, TBD, Transmission line, alphameric, cam, capacitor, core memory, diode-transistor logic, drum memory, fictional computer, flip-flops, gold, index registers, indirect addressing, op code, printed circuit, relay, relays, resistor-transistor logic, signed magnitude, switches, transistorized, wordmark
 Adapted from the Wikipedia article "Development history", under the G.N U Free Docmentation License. Please also see http://en.wikipedia.org/wiki |