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Analog-to-digital converter - ADC structures |  | Analog-to-digital converter - ADC structures: Encyclopedia II - Analog-to-digital converter - ADC structures |  | These are the most common ways of implementing an electronic ADC:
A direct conversion ADC or flash ADC has a comparator that fires for each decoded voltage range. The comparator bank feeds a logic circuit that generates a code for each voltage range. Direct conversion is very fast, but usually has only 8 bits of resolution (256 comparators) or less, as it needs a large, expensive circuit. ADCs of this type have a large die size, a high input capacitance, and are prone to produce glitches on the output (by outputtin ...
See also:Analog-to-digital converter, Analog-to-digital converter - Resolution, Analog-to-digital converter - Response type, Analog-to-digital converter - Linear ADCs, Analog-to-digital converter - Non-linear ADCs, Analog-to-digital converter - Accuracy, Analog-to-digital converter - Sampling rate, Analog-to-digital converter - Aliasing, Analog-to-digital converter - Dither, Analog-to-digital converter - Oversampling, Analog-to-digital converter - ADC structures, Analog-to-digital converter - Application to music recording, Analog-to-digital converter - Other applications |  | | Analog-to-digital converter, Analog-to-digital converter - ADC structures, Analog-to-digital converter - Accuracy, Analog-to-digital converter - Aliasing, Analog-to-digital converter - Application to music recording, Analog-to-digital converter - Dither, Analog-to-digital converter - Linear ADCs, Analog-to-digital converter - Non-linear ADCs, Analog-to-digital converter - Other applications, Analog-to-digital converter - Oversampling, Analog-to-digital converter - Resolution, Analog-to-digital converter - Response type, Analog-to-digital converter - Sampling rate, Digital signal processing, Modem, quantization noise |  | |
|  |  | Analog-to-digital converter: Encyclopedia II - Analog-to-digital converter - ADC structures
Analog-to-digital converter - ADC structures
These are the most common ways of implementing an electronic ADC:
- A direct conversion ADC or flash ADC has a comparator that fires for each decoded voltage range. The comparator bank feeds a logic circuit that generates a code for each voltage range. Direct conversion is very fast, but usually has only 8 bits of resolution (256 comparators) or less, as it needs a large, expensive circuit. ADCs of this type have a large die size, a high input capacitance, and are prone to produce glitches on the output (by outputting an out-of-sequence code). They are often used for video or other fast signals.
- A successive-approximation ADC uses a comparator to reject ranges of voltages, eventually settling on a final voltage range. The way successive approximation works is thru constantly comparing the input voltage to a known reference voltage until the best approximation is achieved. At each step in this process, a binary value of the approximation is stored in a successive approximation register (SAR).The SAR uses a reference voltage (which is predetermined and reflects the conditions for which the ADC is used for) for comparisons. For example if the input voltage is 150V and the reference voltage is 100V, in the 1st clock cycle the voltage out is negative (in the sense that 100V is less than 150V). In the 2nd clock cycle the voltage might increase by say 30V (the increment being predetermined) to 130V. This value is still negative. The 3rd clock cycle results in 160V, in which case the output is positive (as the output exceeds the input voltage). The result of this would be in the binary form 110. The 1’s refereeing to the times the voltage was negative and the 0’s referring to the positives (note in this case it is a 3-bit ADC, as the clock runs 3 times). This is also called bit-weighting conversion, and is similar to a binary search.By increasing the number of bit cycles and decreasing the increment rise it is possible to construct an accurate ADC. ADCs of this type have good resolutions and quite wide ranges. They are more complex than some other designs.
- A delta-encoded ADC has an up-down counter that feeds a digital to analog converter (DAC). The input signal and the DAC both go to a comparator. The comparator controls the counter. The circuit uses negative feedback from the comparator to adjust the counter until the DAC's output is close enough to the input signal. The number is read from the counter. Delta converters have very wide ranges, and high resolution, but the conversion time is dependent on the input signal level, though it will always have a guaranteed worst-case. Delta converters are often very good choices to read real-world signals. Most signals from physical systems do not change abruptly. Some converters combine the delta and successive approximation approaches; this works especially well when high frequencies are known to be small in magnitude.
- A ramp-compare ADC (also called integrating, dual-slope or multi-slope ADC) produces a saw-tooth signal that ramps up, then quickly falls to zero. When the ramp starts, a timer starts counting. When the ramp voltage matches the input, a comparator fires, and the timer's value is recorded. Timed ramp converters require the least number of transistors. The ramp time is sensitive to temperature because the circuit generating the ramp is often just some simple oscillator. There are two solutions: use a clocked counter driving a DAC and then use the comparator to preserve the counter's value, or calibrate the timed ramp. A special advantage of the ramp-compare system is that comparing a second signal just requires another comparator, and another register to store the voltage value.
- A pipeline ADC (also called subranging quantizer) uses two or more steps of subranging. First, a coarse conversion is done. In a second step, the difference to the input signal is determined with a digital to analog converter (DAC). This difference is then converted finer, and the results are combined in a last step. This type of ADC is fast, has a high resolution and only requires a small die size.
- A Sigma-Delta ADC (also known as a Delta-Sigma ADC) oversamples the desired signal by a large factor and filters the desired signal band. Generally a smaller number of bits than required are converted using a Flash ADC after the Filter. The resulting signal, along with the error generated by the discrete levels of the Flash, is fed back and subtracted from the input to the filter. This negative feedback has the effect of noise shaping the error due to the Flash so that it does not appear in the desired signal frequencies. A digital filter (decimation filter) follows the ADC which reduces the sampling rate, filters off unwanted noise signal and increases the resolution of the output. (sigma-delta modulation, also called delta-sigma modulation)
Nonelectronic ADCs usually use some scheme similar to one of the above.
These are usually integrated circuits.
Most converters sample with 6 to 24 bits of resolution, and produce fewer than 1 megasample per second. Mega- and gigasample converters are available, though (Feb 2002). Megasample converters are required in digital video cameras, video capture cards, and TV tuner cards to convert full-speed analog video to MPEG digital video files. Commercial converters usually have ±0.5 to ±1.5 LSB error in their output.
The most expensive part of an integrated circuit is the pins, because they make the package larger, and each pin has to be connected to the integrated circuit's silicon. To save pins, it's common for slow ADCs to send their data one bit at a time over a serial interface to the computer, with the next bit coming out when a clock signal changes state, say from zero to 5V. This saves quite a few pins on the ADC package, and in many cases, does not make the overall design any more complex. (Even microprocessors which use memory-mapped IO only need a few bits of a port to implement a serial bus to an ADC.)
Commercial ADCs often have several inputs that feed the same converter, usually through an analog multiplexer. Different models of ADC may include sample and hold circuits, instrumentation amplifiers or differential inputs, where the quantity measured is the difference between two voltages.
Other related archivesCDF, DAC, Digital signal processing, Full scale, LSB, MPEG, Modem, Nyquist frequency, Nyquist-Shannon sampling theorem, PCM, RMS, Shannon-Nyquist sampling theorem, TV tuner cards, a-law, aliasing, amplifiers, anti-aliasing, binary search, bits, calibration, capacitance, capacitor, compact disc, companders, comparator, compressors, continuous, counter, delta-sigma modulation, die, differential, digital, digital oscilloscopes, digital to analog converter, digital-to-analog converter, dither, dithering, dynamic range, electricity meters, electronic, entropy, feedback, filtered, glitches, integrated circuits, interpolation, kilohertz, laplacian distribution, least significant bit, linear, linearity, logic circuit, magnitude, memory-mapped IO, microcontrollers, microprocessors, multiplexer, noise shaping, oscillator, probability density function, quantization, quantization error, quantization noise, resolution, sample and hold, sampling frequency, saw-tooth signal, serial, serial bus, shaft encoders, sigma-delta modulation, signal-to-noise ratio, signals, software defined radio, standard deviation, time, transistors, uniform, uniform distribution, video, video cameras, video capture cards, voltage, volts, white noise, μ-law
 Adapted from the Wikipedia article "ADC structures", under the G.N U Free Docmentation License. Please also see http://en.wikipedia.org/wiki |
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