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Logical effort - Intrinsic properties of a circuit | | Logical effort - Intrinsic properties of a circuit: Encyclopedia II - Logical effort - Intrinsic properties of a circuit | | Basically it is equivalent/normalized RC value at input.
A simple multi-stage inverter sizing problem illustrates the idea:
http://bwrc.eecs.berkeley.edu/Classes/IcDesign/EE141_s02/Lectures/Lecture7-invsize.PDF
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See also:Logical effort, Logical effort - Derivation of delay in a logic gate, Logical effort - Delay in an inverter, Logical effort - Delay in a NAND gate, Logical effort - Intrinsic properties of a circuit | | | Logical effort, Logical effort - Delay in a NAND gate, Logical effort - Delay in an inverter, Logical effort - Derivation of delay in a logic gate, Logical effort - Intrinsic properties of a circuit, Sutherland, Ivan E, et. al. Logical Effort: Designing Fast CMOS Circuits. 1999. | | |
| | | Logical effort: Encyclopedia II - Logical effort - Intrinsic properties of a circuit
Logical effort - Intrinsic properties of a circuit
Basically it is equivalent/normalized RC value at input.
A simple multi-stage inverter sizing problem illustrates the idea:
http://bwrc.eecs.berkeley.edu/Classes/IcDesign/EE141_s02/Lectures/Lecture7-invsize.PDF
 Adapted from the Wikipedia article "Intrinsic properties of a circuit", under the G.N U Free Docmentation License. Please also see http://en.wikipedia.org/wiki |
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