List of Intel microprocessors - 32-bit processors: Pentium 4 range - Encyclopedia II

• 0.18 μm process technology (1.40 and 1.50 GHz)
  • Introduced November 20, 2000
  • L2 cache was 256KB Advanced Tansfer Cache (Integrated)
  • Processor Package Style was PGA423, PGA478
  • System Bus Speed 400 MHz
  • SSE2 SIMD Extensions
  • Number of Transistors 42 million
  • Used in desktops and entry-level workstations
• 0.18 μm process technology (1.7 GHz)
  • Introduced April 23, 2001
  • See the 1.4 and 1.5 chips for details
• 0.18 μm process technology (1.6 and 1.8 GHz)
  • Introduced July 2, 2001
  • See 1.4 and 1.5 chips for details
  • Core Voltage is 1.15 volts in Maximum Performance Mode; 1.05 volts in Battery Optimized Mode
  • Power <1 watt in Battery Optimized Mode
  • Used in full-size and then light mobile PCs
• 0.18 μm process technology "Willamette" (1.9 and 2.0 GHz)
  • Introduced August 27, 2001
  • See 1.4 and 1.5 chips for details
• Pentium 4 (2 GHz, 2.20 GHz)
  • Introduced January 7, 2002
• Pentium 4 (2.4 GHz)
  • Introduced April 2, 2002
• 0.13 μm process technology "Northwood A"(1.7, 1.8, 1.9, 2, 2.2, 2.4, 2.5, 2.6 GHz)
  • Improved branch prediction and other microcodes tweaks
  • 512KB integrated L2 cache
  • Number of transistors 55 million
  • 400 MHz system bus.
• 0.13 μm process technology "Northwood B" (2.26, 2.4, 2.53, 2.66, 2.8, 3.06 GHz)
  • 533 MHz system bus. (3.06 includes Intel's hyper threading technology).
• 0.13 μm process technology "Northwood C" (2.4, 2.6, 2.8, 3.0, 3.2, 3.4 GHz)
  • 800MHz system bus (all versions include Hyper Threading)
  • 6500 to 10000 MIPS

Itanium (chronological entry)

• Introduced 2001
• See main entry

• Official designation now Xeon, i.e. not "Pentium 4 Xeon"
• Xeon 1.4, 1.5, 1.7 GHz
  • Introduced May 21, 2001
  • L2 cache was 256KB Advanced Transfer Cache (Integrated)
  • Processor Package Style was Organic Lan Grid Array 603 (OLGA 603)
  • System Bus Speed 400MHz
  • SSE2 SIMD Extensions
  • Used in high-performance and mid-range dual processor enabled workstations
• Xeon 2.0 GHz and up to 3.6 GHz
  • Introduced September 25, 2001

Itanium 2 (chronological entry)

• Introduced July 2002
• See main entry

• Introduced September 2003
• EE = "Extreme Edition"
• Built from the Xeon's "Gallatin" core, but with 2MB cache

• Introduced February 2004
• built on 0.09 μm (90 nm) process technology "Prescott" (2.4A, 2.8, 2.8A, 3.0, 3.2, 3.4, 3.6, 3.8) 1MB L2 cache
• 533MHz system bus (2.4A and 2.8A only)
• 800MHz system bus (all other models)
• Hyper-Threading support is only available on CPUs using the 800MHz system bus.
• The processor's integer instruction pipeline has been increased from 20 stages to 31 stages, which theoretically allows for even greater clock speeds.
• 7500 to 11000 MIPS
• LGA-775 versions are in the 5xx series (32-bit) and 5x1 series (with EM64T)
• The 6xx series has 2MB L2 cache and EM64T

• Introduced Spring 2004
• same core as 4E, "Prescott"
• 3.2–3.6 GHz
• starting with the D0 stepping of this processor, EM64T 64-bit extensions has also been incorporated

• Introduced Q2 2005
• "Smithfield" dual-core version
• 2.8–3.2 GHz
• 1MB+1MB L2 cache (non-shared, 2MB total)
• 800MHz system-bus
• Not hyperthreading, performance increase of 60% over similarly clocked Prescott
• Cache-coherency between cores requires communication over the 800MHz FSB

Adapted from the Wikipedia article "32-bit processors: Pentium 4 range", under the G.N U Free Docmentation License. Please also see http://en.wikipedia.org/wiki/Main_Page